MAX6301 datasheet

http://www.datasheet-photos.com/images/1pcsB.jpgIf you want to buy this product please visit:http://www.datasheet-photos.com/Product/MAX6301.htmlPopular search:MAX6301 datasheetMAX6301 buyMAX6301 pinoutMAX6301 circuit19-1078; Rev 0; 6/96+5V, Low-Power µP Supervisory Circuits with Adjustable Reset/Watchdog General DescriptionThe MAX6301/MAX6302/MAX6303/MAX6304* low- power microprocessor (µP) supervisory circuits provide maximum adjustability for reset and watchdog functions. The reset threshold can be adjusted to any voltage above 1.22V, using external resistors. In addition, thereset and watchdog timeout periods are adjustable using external capacitors. A watchdog select pin Features�Adjustable Reset Threshold�Adjustable Reset Timeout�Adjustable Watchdog Timeout�500x Watchdog Timeout Multiplier�4µA Supply Currentextends the watchdog timeout period to 500x. The reset�RESET orOutput Optionsfunction features immunity to power-supply transients.These four devices differ only in the structure of their reset�Push/Pull or Open-Drain Output Optionsoutputs (see Selector Guide). The MAX6301–MAX6304�GuaranteedAsserted At or Aboveare available in the space-saving 8-pin µMAX package, as well as 8-pin DIP/SO. Applications Medical Equipment Embedded Controllers Intelligent Instruments Critical µP Monitoring Portable Equipment Set-Top BoxesBattery-Powered ComputersComputers/Controllers Selector GuideVCC = 1V (MAX6301/MAX6303)�Power-Supply Transient Immunity�Watchdog Function Can Be Disabled�DIP/SO/µMAX Packages Available Ordering InformationPART TEMP. RANGE PIN-PACKAGEMAX6301CPA 0°C to +70°C 8 Plastic DIPMAX6301CSA 0°C to +70°C 8 SOMAX6301CUA 0°C to +70°C 8 µMAXMAX6301EPA -40°C to +85°C 8 Plastic DIPMAX6301ESA -40°C to +85°C 8 SOOrdering Information continued at end of data sheet. Typical Operating Circuit Pin ConfigurationTOP VIEW1 RESET IN2 GNDVCC 8RESET 7 (RESET)MAX6301RESET IN 18 VCCMAX6301 MAX6302RL MAX6302 µPGND 2MAX63017 RESET (RESET)3 SRTMAX6303WDI 6SRT 3MAX6302MAX63036 WDI4 SWT MAX6304 WDS 5SWT 4MAX6304DIP/SO/ MAXWDS = 0 FOR NORMAL MODE WDI = 1 FOR EXTENDED MODE( ) ARE FOR MAX6302/MAX6304.* Patents pending( ) ARE FOR MAX6302/MAX6304. Maxim Integrated Products 1ABSOLUTE MAXIMUM RATINGSVCC .................................................. .....................-0.3V to +7.0V RESET IN, SWT, SRT ..................................-0.3V to (VCC + 0.3V) WDI, WDS .................................................. ............-0.3V to +7.0V RESET, RESETMAX6301 .................................................. .........-0.3V to +7.0V MAX6302/6303/6304 ..............................-0.3V to (VCC + 0.3V)Input CurrentVCC .................................................. .............................±20mA GND .................................................. ............................±20mAOutput CurrentRESET, RESET .................................................. ............±20mAContinuous Power Dissipation (TA = +70°C)Plastic DIP (derate 9.09mW/°C above +70°C) ............727mWSO (derate 5.88mW/°C above +70°C) .........................471mWµMAX (derate 4.10mW/°C above +70°C) ....................330mW Operating Temperature RangesMAX630_C_A .................................................. ....0°C to +70°C MAX630_E_A .................................................. .-40°C to +85°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10sec) .............................+300°CStresses beyond those listed under “Absolute Maximum Ratings�may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.ELECTRICAL CHARACTERISTICS(VCC = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V and TA = +25°C.)TA = 0°C to +70°CELECTRICAL CHARACTERISTICS (continued)(VCC = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V and TA = +25°C.)PARAMETERSYMBOLCONDITIONSMIN TYP MAXWATCHDOG TIMERWDI, WDS Input Threshold0.7VCC0.3VCCWDI Pulse WidthVCC = 4.5V to 5.5VVCC = 2V to 4.5VWDI, WDS Leakage CurrentExtended mode disabledWDI Sink/Source Current(Note 4)Extended mode enabledWatchdog Timeout Period(Note 3)WDS = GND, CSWT = 1500pF2.8 4.0 5.2WDS = VCC, CSWT = 1500pF1.4 2.0 2.6Note 1: Reset is guaranteed valid from the selected reset threshold voltage down to the minimum VCC.Note 2: VDS = VCC, WDI unconnected.Note 3: Precision timing currents of 500nA are present at both the SRT and SWT pins. Timing capacitors connected to these nodes must have low leakage consistent with these currents to prevent timing errors.Note 4: The sink/source is supplied through a resistor, and is proportional to VCC (Figure 8). At VCC = 2V, it is typically ±24µA. Typical Operating Characteristics(CSWT = CSRT = 1500pF, TA = +25°C, unless otherwise noted.)RESET TIMEOUT PERIODvs. CSRTVCC = 5VEXTENDED-MODEWATCHDOG TIMEOUT PERIOD vs. CSWT(WDS = VCC)VCC = 5VNORMAL-MODEWATCHDOG TIMEOUT PERIOD vs. CSWT(WDS = GND)VCC = 5V10 10 100.001 0.01 0.1 1 10 100 1000CSRT (nF)0.001 0.01 0.1 1 10 100 1000CSWT (nF)0.001 0.01 0.1 1 10 100 1000CSWT (nF) Typical Operating Characteristics (continued)(CSWT = CSRT = 1500pF, TA = +25°C, unless otherwise noted.)SUPPLY CURRENT vs. SUPPLY VOLTAGERESET DEASSERTED NO LOADRESET AND NORMAL-MODE WATCHDOG TIMEOUT PERIOD vs. TEMPERATUREVCC = 5.0VMAXIMUM TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE (VRST)SEE NEGATIVE-GOING VCCTRANSIENTS SECTIONRESET OCCURS ABOVE THE CURVEVRST = 4.60V2.0 2.53.0 3.5 4.04.5 5.0 5.5-20 020 4060 800 200 400 600SUPPLY VOLTAGE (V)TEMPERATURE (°C)RESET THRESHOLD OVERDRIVE (mV)SUPPLY CURRENTvs. TEMPERATURERESET DEASSERTED NO LOADVCC = 5.0VVCC = 2.0VRESET IN THRESHOLD VOLTAGEvs. TEMPERATURE-20 020 4060 80-20 020 4060 80TEMPERATURE (°C)TEMPERATURE (°C)VCC TO RESET DELAYvs. TEMPERATURE (VCC FALLING)VCC FALLING AT 1mV/ sRESET AND WATCHDOG TIMEOUT vs. VCC56 4.000 20 4060 80TEMPERATURE (°C)SUPPLY VOLTAGE (V) Pin DescriptionFUNCTIONRESET INReset Input. High-impedance input to the reset comparator. Connect this pin to the center point of an external resistor voltage-divider network to set the reset threshold voltage. The reset threshold voltage is calculated as follows: VRST = 1.22 x (R1 + R2) / R2 (see Typical Operating Circuit).GroundSet Reset-Timeout Input. Connect a capacitor between this input and ground to select the reset timeout period (tRS). Determine the period as follows: tRP = 2.67 x CSRT, with CSRT in pF and tRP in µs (see Typical Operating Circuit).Set Watchdog-Timeout Input. Connect a capacitor between this input and ground to select the basic watchdog timeout period (tWD). Determine the period as follows: tWD = 2.67 x CSWT, with CSWT in pF and tWD in µs. The watchdog function can be disabled by connecting this pin to ground.Watchdog-Select Input. This input selects the watchdog mode. Connect to ground to select normal mode and the basic watchdog timeout period. Connect to VCC to select extended mode, multiplying the basic timeout period by a factor of 500. A change in the state of this pin resets the watchdog timer to zero.Watchdog Input. A rising or falling transition must occur on this input within the selected watchdog timeout period, or a reset pulse will occur. The capacitor value selected for SWT and the state of WDS determine the watchdog timeout period. The watchdog timer clears and restarts when a transition occurs on WDI or WDS. The watchdog timer is cleared when reset is asserted and restarted after reset deasserts. In the extended watchdog mode (WDS = VCC), the watchdog function can be disabled by driving WDI with a three-stated driver or by leaving WDI unconnected.(MAX6301/3)Open-Drain, Active-Low ResetOutput (MAX6301)RESET changes from high to low whenever the monitored voltage (VIN) drops below the selected reset threshold (VRST). RESET remains low as long as VIN is below VRST. Once VIN exceeds VRST, RESET remains low for the reset timeout period and then goes high. The watchdog timer triggers a reset pulse (tRP) whenever the watch- dog timeout period (tWD) is exceeded.Push/Pull, Active-Low ResetOutput (MAX6303)RESET (MAX6302/4)Open-Drain, Active-High ResetOutput (MAX6302)RESET changes from low to high whenever the monitored voltage (VIN) drops below the selected reset threshold (VRST). RESET remains high as long as VIN is below VRST. Once VIN exceeds VRST, RESET remains high for the reset timeout period and then goes low. The watchdog timer triggers a reset pulse (tRP) whenever the watch- dog timeout period (tWD) is exceeded.Push/Pull, Active-High ResetOutput (MAX6304)Supply Voltage Detailed DescriptionReset Function/Output The reset output is typically connected to the reset input of a microprocessor (µP). A µP’s reset input starts or restarts the µP in a known state. The MAX6301�MAX6304 µP supervisory circuits provide the reset logic to prevent code-execution errors during power- up, power-down, and brownout conditions (see Typical Operating Circuit).For the MAX6301/MAX6303, RESET changes from high to low whenever the monitored voltage (VIN) drops below the reset threshold voltage (VRST). RESET remains low as long as VIN is below VRST. Once VIN exceeds VRST, RESET remains low for the reset timeout period, then goes high. When a reset is asserted due to a watchdog timeout condition, RESET stays low for theRESET INMAX6301MAX6302MAX6303MAX6304VRST = 1.22 R1 + R2reset timeout period. Anytime reset asserts, the watch- dog timer clears. At the end of the reset timeout period, RESET goes high and the watchdog timer is restarted from zero. If the watchdog timeout period is exceeded again, then RESET goes low again. This cycle contin- ues unless WDI receives a transition.On power-up, once VCC reaches 1V, RESET is guaran-Figure 1. Calculating the Reset Threshold Voltage (VRST)R2 can have very high values to minimize current con- sumption. Set R2 to some conveniently high value (1M� for example) and calculate R1 based on the desired reset threshold voltage, using the following formula:teed to be a logic low. For information about applica- tions where VCC is less than 1V, see the section Ensuring a Valid RESET/RESET Output Down to VCC =0V (MAX6303/MAX6304). As VCC rises, RESET remainsR1 R2 VRSTWatchdog Timerlow. When VIN rises above VRST, the reset timer startsand RESET remains low. When the reset timeout periodends, RESET goes high.On power-down, once VIN goes below VRST, RESET goes low and is guaranteed to be low until VCC droops below 1V. For information about applications where VCC is less than 1V, see the section Ensuring a Valid RESET/RESET Output Down to VCC = 0V (MAX6303/ MAX6304).The MAX6302/MAX6304 active-high RESET output is the inverse of the MAX6301/MAX6303 active-low RESET output, and is guaranteed valid for VCC > 1.31V.Reset Threshold These supervisors monitor the voltage on RESET IN. The MAX6301–MAX6304 have an adjustable reset threshold voltage (VRST) set with an external resistor voltage divider (Figure 1). Use the following formula to calculate VRST (the point at which the monitored volt- age triggers a reset):The watchdog circuit monitors the µP’s activity. If the µP does not toggle the watchdog input (WDI) within tWD (user selected), reset asserts. The internal watchdog timer is cleared by reset, by a transition at WDI (which can detect pulses as short as 30ns), or by a transition at WDS. The watchdog timer remains cleared while reset is asserted; as soon as reset is released, the timer starts counting (Figure 2).The MAX6301–MAX6304 feature two modes of watch- dog timer operation: normal mode and extended mode. In normal mode (WDS = GND), the watchdog timeout period is determined by the value of the capacitor con- nected between SWT and ground (see the section Selecting the Reset and Watchdog Timeout Capacitor). In extended mode (WDS = VCC), the watchdog timeout period is multiplied by 500. For example, in the extend- ed mode, a 1µF capacitor gives a watchdog timeout period of 22 minutes (see the graph Extended-Mode Watchdog Timeout Period vs. CSWT in the Typical Operating Characteristics).R1 R2In extended mode, the watchdog function can be dis- abled by leaving WDI unconnected or by three-statingwhere VRST is the desired reset threshold voltage andVTH is the reset input threshold (1.22V). Resistors R1 andthe driver connected to WDI. In this mode, the watch- dog input is internally driven low during the watchdogtWD tRPNORMAL MODE (WDS = GND)Figure 2a. Watchdog Timing Diagram, WDS = GNDtWD x 500 tRPEXTENDED MODE (WDS = VCC)Figure 2b. Watchdog Timing Diagram, WDS = VCCtimeout period, then momentarily pulses high, resetting the watchdog counter. When WDI is left unconnected, the watchdog timer is cleared by this internal driver just before the timeout period is reached (the internal driver pulls WDI high at about 94% of tWD). When WDI is three-stated, the maximum allowable leakage current ofMAX6301the device driving WDI is 10µA.In normal mode (WDS = GND), the watchdog timer cannot be disabled by three-stating WDI. WDI is a high-impedance input in this mode. Do not leave WDI unconnected in normal mode.SRT MAX6302MAX6303 SWT MAX6304CRST = tRPCRST in pFtWD in µsCSWT = tWDCSWT in pFtWD in µsFigure 3. Calculating the Reset (CSRT) and Watchdog(CSWT) Timeout Capacitor ValuesRESET INMAX6302R2 MAX6301MAX6302MAX6303 MAX6304RST I/O I/OVRST = 1.22 R1 + R2* THREE-STATE LEAKAGE MUST BE